WIDTH=WIDTH_0, TXMSK=TXMSK_0, PRESCALE=PRESCALE_0, CPOL=CPOL_0, RXMSK=RXMSK_0, BYSW=BYSW_0, CONT=CONT_0, CONTC=CONTC_0, LSBF=LSBF_0, PCS=PCS_0, CPHA=CPHA_0
Transmit Command Register
| FRAMESZ | Frame Size |
| WIDTH | Transfer Width 0 (WIDTH_0): 1 bit transfer 1 (WIDTH_1): 2 bit transfer 2 (WIDTH_2): 4 bit transfer |
| TXMSK | Transmit Data Mask 0 (TXMSK_0): Normal transfer 1 (TXMSK_1): Mask transmit data |
| RXMSK | Receive Data Mask 0 (RXMSK_0): Normal transfer 1 (RXMSK_1): Receive data is masked |
| CONTC | Continuing Command 0 (CONTC_0): Command word for start of new transfer 1 (CONTC_1): Command word for continuing transfer |
| CONT | Continuous Transfer 0 (CONT_0): Continuous transfer is disabled 1 (CONT_1): Continuous transfer is enabled |
| BYSW | Byte Swap 0 (BYSW_0): Byte swap is disabled 1 (BYSW_1): Byte swap is enabled |
| LSBF | LSB First 0 (LSBF_0): Data is transferred MSB first 1 (LSBF_1): Data is transferred LSB first |
| PCS | Peripheral Chip Select 0 (PCS_0): Transfer using LPSPI_PCS[0] 1 (PCS_1): Transfer using LPSPI_PCS[1] 2 (PCS_2): Transfer using LPSPI_PCS[2] 3 (PCS_3): Transfer using LPSPI_PCS[3] |
| PRESCALE | Prescaler Value 0 (PRESCALE_0): Divide by 1 1 (PRESCALE_1): Divide by 2 2 (PRESCALE_2): Divide by 4 3 (PRESCALE_3): Divide by 8 4 (PRESCALE_4): Divide by 16 5 (PRESCALE_5): Divide by 32 6 (PRESCALE_6): Divide by 64 7 (PRESCALE_7): Divide by 128 |
| CPHA | Clock Phase 0 (CPHA_0): Data is captured on the leading edge of SCK and changed on the following edge of SCK 1 (CPHA_1): Data is changed on the leading edge of SCK and captured on the following edge of SCK |
| CPOL | Clock Polarity 0 (CPOL_0): The inactive state value of SCK is low 1 (CPOL_1): The inactive state value of SCK is high |